With development of semiconductor technology, polysilicon transistors can no longer meet small-sized semiconductor process requirements, due to problems such as large leakage current, high power consumption, etc. Therefore, metal gate transistors have been proposed.
An existing method for forming a metal gate transistor can include the following steps. Referring to FIG. 1, a substrate 1 is provided and a dummy gate 2 is formed on a surface of the substrate 1.
Referring to FIG. 2, a first interlayer dielectric layer 3 is formed on the surface of the substrate 1. The first interlayer dielectric layer 3 is polished by chemical mechanical polishing until the dummy gate 2 is exposed.
Referring to FIG. 3, the dummy gate 2 (as shown in FIG. 2) is removed to form a trench. A metal gate stack 4 is then formed to cover the first interlayer dielectric layer 3 and fill the trench.
Referring to FIG. 4, the metal gate stack 4 is polished by chemical mechanical polishing to expose the first interlayer dielectric layer 3 and form a metal gate electrode 5. Referring to FIG. 5, a second interlayer dielectric layer 6 is formed on the first interlayer dielectric layer 3 and the metal gate electrode 5.
However, in practical applications, metal gate transistors formed by the existing method suffer from poor performance. Therefore, there is a need for improved methods for forming metal gate transistors.